CWE-1246: Improper Write Handling in Limited-write Non-Volatile Memories

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Description

The product does not implement or incorrectly implements wear leveling operations in limited-write non-volatile memories.

Extended Description

Non-volatile memories such as NAND Flash, EEPROM, etc. have individually erasable segments, each of which can be put through a limited number of program/erase or write cycles. For example, the device can only endure a limited number of writes, after which the device becomes unreliable. In order to wear out the cells in a uniform manner, non-volatile memory and storage products based on the above-mentioned technologies implement a technique called wear leveling. Once a set threshold is reached, wear leveling maps writes of a logical block to a different physical block. This prevents a single physical block from prematurely failing due to a high concentration of writes. If wear leveling is improperly implemented, attackers may be able to programmatically cause the storage to become unreliable within a much shorter time than would normally be expected.


ThreatScore

Threat Mapped score: 0.0

Industry: Finiancial

Threat priority: Unclassified


Observed Examples (CVEs)

Related Attack Patterns (CAPEC)


Attack TTPs

N/A

Modes of Introduction

Phase Note
Architecture and Design N/A
Implementation N/A

Common Consequences

Potential Mitigations

Applicable Platforms


Demonstrative Examples

Intro: An attacker can render a memory line unusable by repeatedly causing a write to the memory line.

Body: Below is example code from [REF-1058] that the user can execute repeatedly to cause line failure. W is the maximum associativity of any cache in the system; S is the size of the largest cache in the system.

// Do aligned alloc of (W+1) arrays each of size S while(1) { for (ii = 0; ii < W + 1; ii++) array[ii].element[0]++; }

Notes

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